General informations

Keywords and skills:
data-flow computing, data parallelism, task parallelism, programming model, synchronous programming, runtime system, OpenCL, compilation, many-core, system-on-chip


STMicroelectronics designed in collaboration with CEA a new generation embedded many-core, called P2012, which has for first targets image analytics and computer vision applicative fields. It has been thought to be either a fully programmable computing fabric for best time-to-market, or a heterogeneous accelerator mixing software and hardware component for best performance. This P2012 embedded many-core is programmed with OpenCL

OpenCL has been the first industrial standard covering both task and data parallelism, as well as heterogeneous hardware systems composed of a host CPU and a set of compute accelerators that may be programmable or not. OpenCL then can cover the workload of a modern system-on-chip (SoC) and is well adapted to program image processing algorithms. Nevertheless, its programming model requires many interactions between the host processor and the accelerator and its memory model can make the off-chip memory a bottleneck in term of performance and power consumption. A many-core accelerator like P2012 has some architectural capabilities that are broader than the conceptual OpenCL device architecture, capabilities that could be better exploited by extending OpenCL.

The PHD thesis will investigate the extension of the OpenCL programming model with data-flow principles, with two main objectives: 1.better leverage on the architecture of SoCs and embedded many-core accelerators (memory bandwidth usage, power and energy efficiency); 2.ensure a good interoperability between programmable and hardwired components in the SoC or inside the accelerator. The proposed extension should preserve the spirit of OpenCL, including the portability over a large set of compute device (CPU, GPU, many-core, FPGA), the scalability and the possibility to build software components dynamically from the host processor. Keeping this spirit is a challenge by itself, and we will address this challenge through a tight combination of fundamental studies on data-flow synchronous semantics and immersion into the practice of OpenCL, from its design to its target-specific implementation and applications.

The emphasis on data-flow synchronous principles (synchronous Kahn networks) will offer target- and schedule-independence, static liveness and resource allocation. It will also offer excellent expressiveness, combining control (including finite state automata, data-dependent control) and data-flow concurrency in a modular way. The aim of this thesis is to investigate synchronous program distribution and GALS design methods to be able to generate, from a high-level model, efficient single-threaded code for each compute engine of the accelerator device. We will investigate different integration and transfer paths, from language prototypes to proposals of OpenCL extensions, leveraging program generation through the dynamic compilation capabilities of OpenCL.

Duration and required knowledge:

The PHD thesis will last 3 years, in collaboration between INRIA and STMicroelectronics. This thesis will be CIFRE (Conventions Industrielles de Formation par la REcherche) and the student will be an ST employee for the duration of the thesis.

The applicant must have a Master Degree in either Computer Science or Computer Engineering, have some knowledge of in parallel programming, some practical experience in developing runtime system and working in a compiler, as well as strong programming skills in C. The applicant must be attracted in working in complex technical environment covering several fields. Some knowledge and practical experiences with OpenCL, CUDA and of data-flow models (such as Kahn networks, synchronous programming, SDF, StreamIt) is a plus. A practical knowledge and experience of Java, Linux and of the image processing or computer vision field is also a plus.


STMicroelectronics is one of the main semiconductor companies in the world. OpenCL has for main objective programming the emerging intersection between general purpose CPU and graphic processors, the first being more and more parallel and the second more and more programmable. STMicroelectronics actively contributes to the evolution of OpenCL in the Khronos industrial consortium, with other leader companies on this computing field.

INRIA, the French national institute for research in computer science and control, operating under the joint authority of the Ministries of Research and of Industry, is dedicated to fundamental and applied research in information and communication science and technology (ICST). Throughout its eight research centres, INRIA has a workforce of 4000 (3000 of whom are scientists from INRIA or from INRIA's partner organisations). They work in 150 project-teams. Many INRIA researchers are also professors who supervise around 1000 doctoral students, their theses work contributing to INRIA research projects.