:-) :-) :-)


Research Topics

Publications

Personal Interests

Favorite Links

Page Perso

Hamoudi Kalla

Assistant Professor of Computer Science
University Habilitation







Background

Born in 1977, I am a Chaoui originally from Menaa - a small nice city of Algeria. I am graduated in Computer Science Engineer since October 2000 at the University of Batna. I received my Ph.D from Institut National Polytechnique de Grenoble. Research/Academic Interests My research interests include, but are certainly not limited to:
  • Real-Time Distributed Embedded Systems
  • Dependability : Reliability and Fault-Tolerance
  • Real-Time Scheduling Algorithms
  • Multi-Criteria Scheduling Algorithms
  • Verification and Validation of Embedded Systems based Intellectual Property (IP) Components
Since 2001, I am interested in developing new dependability techniques for distributed real-time embedded systems. These systems are being increasingly used in critical real-time applications, such as avionics, air traffic control, autopilot systems, and nuclear plant control, in which the consequences of missing a tasks deadline may cause catastrophic loss of money, time, or even human life. My goal is to propose a solution to automatically produce a fault tolerant and a reliable code of a given algorithm onto a given distributed architecture, according to reliability and real-time constraints. As a result of the research collaboration with Alain Girault (scientific leader of the POP ART team) and Yves Sorel (scientific leader of the Aoste team ), we have integrated into SynDEx tool new dependability techniques for hardware faults. I am interested also with Alain Girault and Denis Trystram in developing new bi-criteria Scheduling problems.

Since 2005, I am interested with Jean-Pierre Talpin in developing new techniques for functional and compositional correctness of Intellectual Property Components. Common system level capture in software programming languages such as C/C++ allow for a comfortable design entry and simulation, but mere simulation is not enough to ensure proper design integration. Validating that reused components are properly connected to each other and function correctly has become a major issue for such designs and requires the use of formal methods. we propose an approach in which we automatically translate C/C++ programs into the synchronous formalism SIGNAL, hence enabling the application of formal methods without having to deal with the complex and error prone task to build formal models by hand. The main benefit of considering the model of SIGNAL for C/C++ languages lies in the formal nature of the synchronous language SIGNAL, on which verification and optimization techniques can be performed.